In a Time Division Multiplexing (TDM) technology, the time provided to an entire channel for transmitting information is divided into several time slices (referred to as time slots for short), and the time slots are assigned to multiple paths of signals, each path of signal is used for conducting data transmission by exclusively occupying the channel in its own time slot, and a plurality of data streams with low rates is combined as a single data stream with a high rate.
A feature of the TDM technology is that the time slots are planned and assigned in advance and remain unchanged, so that the TDM is sometimes called Synchronization Time Division Multiplexing (STDM). Being a device for implementing the TDM technology, a time division multiplexer is mainly configured to split multiple channels of data from a plurality of source ends into a plurality of data segments (bits or bytes), where the data segments are transmitted in a specified order, so that the plurality of data streams input to the time division multiplexer is converted to one data stream including all the data segments of the input data streams, and each data segment occupies one time slice or time slot.
In a physical channel, for a transmitted code stream signal, usually since “0” or “1” occurs continuously in the data, when the code type is transmitted in a high rate channel, distortion of the code type easily occurs, and relatively serious Inter-symbol Interference (ISI) influences are generated.
Recently, the problem is solved by using an encoding mode, for example, a common 8B/10B encoding process; however, after the encoding, a malicious code type where a code type with a low switch density and a code type with a high switch density alternately exist may occur, and a time length between the code type with a low switch density and the code type with a high switch density being neighboring on each other is equivalent to or longer than a time constant of receiving a Clock Data Recovery (CDR) circuit. The malicious code type may generate phase transitions. As a result, huge offset may occur to CDR receiving, which may results in serious bit errors.